VPX was originally defined by American Logic Machines Inc (ALM) as a scalable backplane technology. The VPX3264, VPX3232 bridge chips and the scalable backplane were based on VPX. VPX technology was presented at bus&board (VITA) in 2004. ALM continues to build custom chipsets for clients including VME-to-PCIX, VME-to-Futurebus+ and additional custom scalable backplane technologies. VPX, formerly known as VITA 46, is an ANSI standard (ANSI/VITA 46.0-2007) that provides VMEbus-based systems with support for switched fabrics over a new high speed connector. Defined by the VITA (VME International Trade Association) working group (composed of companies such as Boeing, Curtiss-Wright, Elma Electronic, Extreme Engineering (X-ES), GE Intelligent Platforms, Kontron, Mercury Computer Systems, Pentek, Cornet Technology, Inc., and Northrop Grumman), it has been designed specifically with defence applications in mind, with an enhanced module standard that enables applications and platforms with superior performance. VPX retains VME's existing 6U and 3U Eurocard form factors, supporting existing PCI Mezzanine Card (PMC) and XMC mezzanines (PMC with high-speed serial fabric interconnect), and maintaining the maximum possible compatibility with VMEbus.

New generations of embedded systems based on the VPX standard reflect the growing significance of high speed serial switched fabric interconnects such as PCI Express, RapidIO, Infiniband and 10 Gigabit Ethernet. These technologies are replacing traditional parallel communications bus architectures for local communications, because they offer significantly greater capability. Switched fabrics technology supports the implementation of multiprocessing systems that require the fastest possible communications between multiple processors (e.g., digital signal processing applications). VPX gives the large existing base of VMEbus users access to these switched fabrics.


The origins of the VPX was to address the short comings in scalability and performance of on both side of the bus to bus bridging technology. The goal was to include the newer faster VMEbus standards and on the local bus side to include the new generation of PCI bus standards. VPX computer bus standard - V -VME and P -PCI and X the extents for both buses standards.

Technologies called for in VPX include:

  • Both 3U and 6U formats
  • New 7-row high speed connector rated up to 6.25 Gbit/s
  • Choice of high speed serial fabrics
  • PMC, FMC (VITA 57), and XMC (VITA 42) mezzanines
  • Hybrid backplanes to accommodate VME64, VME320 VXS, and VPX boards
  • VPX - bus to bus bridges


In common with additional similar standards, VPX comprises a ‘base line’ specification, which defines the basic mechanical and electrical elements of VPX, together with a series of ‘dot level’ specifications, one or more of which must be implemented to create a functional module. The specifications and their current status are as follows:

Basic module
VITA 46.0VPX Base Standard - ANSI ratified
VITA 46.1VMEbus Signal Mapping on VPX - ANSI ratified
VITA 46.3Serial RapidIO(tm) on VPX Fabric Connector - VITA draught standard for trial use
VITA 46.4PCI Express on VPX Fabric Connector - VITA draught standard for trial use
VITA 46.6Gigabit Ethernet Control Plane on VPX - draft
VITA 46.7Ethernet on VPX Fabric Connector - VITA draught standard for trial use
VITA 46.9PMC/XMC/Ethernet Signal Mapping to 3U/6U on VPX - draft
VITA 46.10Rear transition module on VPX - draft
VITA 46.11System Management on VPX - draft
VITA 46.12Fiber Optic Interface on VPX - Now VITA 66
VITA 46.13Fibre channel on VPX - planned
VITA 46.20Switch slot definition on VPX - draft
VITA 46.21Distributed switching topologies - draft


The single biggest difference between today’s VMEbus boards and VPX boards is that VPX boards use a new connector, developed by Tyco Electronics and known as the MultiGig RT2. This means that VPX boards can't be used in a standard VMEbus chassis, although the use of hybrid chassis is foreseen by the VPX standard. A 6U VPX board features six 16-column 7-row RT2 connectors and one 8-column 7-row RT2 connector, while a 3U board features two 16-column 7-row RT2 connectors and one 8-column 7-row RT2 connector.

Also new for VPX boards are alignment/keying blocks which are designed to be sufficiently robust to prevent pin stubbing. The blocks additionally provide card keying and a safety ground. A 6U board has three such keying blocks, while a 3U board has two.

The MultiGig RT2 connector is specifically designed to enable high performance. It accomplishes this through a 7-row 16-wafer (wafers can be power, differential or single-ended) that delivers highly controlled impedance, minimal insertion loss and less than three percent crosstalk at transfer rates up to 6.25 Gbit/s. The new connector enables a 6U VPX board to feature a total of 707 non-power electrical contacts and a total of 464 signal contacts. The latter are usable as:

  • 64 signals implemented as 32 high speed differential pairs for core fabric
  • 104 VME64 signals
  • 268 for user I/O including 128 high speed differential pairs (giving a total of 160 high speed differential pairs)
  • 28 for system utilities or spares

The connector is designed to allow a typical stiffening bar and a standard length PMC.

Power and ruggedization

A VMEbus slot is limited to a maximum of 90 watts at 5 volts. VPX raises this to 115 watts at the same voltage, or up to 384 watts at 12 volts or 768 watts at 48 volts. The specification of 6U VPX calls for computer cooling via a conduction-cooled envelope compliant with the IEEE standard IEEE-1101.2, which is compatible with existing enclosures. Provision is additionally made for air-cooling via an IEEE 1101.1/10 form factor version.

For more stringent cooling requirements, the REDI (Ruggedized Enhanced Design Implementation – previously known as VITA 48) standard describes how to implement layout techniques to better support cooling methodologies on specific form factors. This provides a specification not only for ESD metal covers on two sides of VPX boards, but additionally for forced air, conduction- and liquid-cooling implementations. REDI additionally addresses spray cooling. To allow for greater power and heat dissipation, REDI includes provision for increased board-to-board spacing and increased board thickness.


A number of manufacturers have announced products based on the VPX standard, in both 3U and 6U form factors. These include single-board computers (based on both Intel and PowerPC architectures), multiprocessors, graphics processors, FPGA-based processing modules, mass storage, switches, and complete integrated subsystems. Today, VPX is a mature standard, with second- and third-generation products coming to market. VPX has additionally been designed into a number of high-profile military programs.


The working group was formed in January 2009 to develop a system-level specification that addressed interoperability improvements for the VITA 46 (VPX) specification. The goal was to improve the interoperability of COTS 3U and 6U VPX boards through the implementation of predefined system topologies, and thus to lower the risk of adoption, expand the addressable market for VPX solutions, increase the market opportunities, and accelerate the deployment of VPX solutions into defence related applications.

The OpenVPX System Specification describes the technical implementation details for 3U and 6U VPX payload and switch modules, backplane topologies, and chassis products, which provides clear guidance on how to build interoperable computing and communication platforms. Widespread adoption of OpenVPX will ultimately create a healthy ecosystem of interoperable components and systems providing customers with the benefits of reuse, choice of best of breed, faster time-to-market, lower risk technology refresh, and a more competitive marketplace.

OpenVPX should be seen as a development of, and complementary to, VPX. The OpenVPX System Specification was ratified by ANSI in June 2010.